• DocumentCode
    1913956
  • Title

    Barrier synchronization on a loaded SMP using two-phase waiting algorithms

  • Author

    Tsafrir, D. ; Feitelson, D.G.

  • Author_Institution
    Sch. of Comput. Sci. & Eng., Hebrew Univ., Jerusalem, Israel
  • fYear
    2001
  • fDate
    15-19 April 2001
  • Abstract
    Little work has been done on the performance of barrier synchronization using two-phase blocking, as the common wisdom is that it is useless to spin if the total number of threads in the system exceeds the number of processors. We challenge this and show that it may be beneficial to spin-wait even if the number of threads is up to double the number of processors, especially if the waiting time is at least twice the context switch overhead (rather than being equal to it). We also characterize the alternating synchronization pattern that applications based on barriers tend to fall into which is quite different from the patterns typically assumed in theoretical analyses.
  • Keywords
    data structures; parallel machines; processor scheduling; synchronisation; barrier synchronization; data structures; multitasking; parallel machines; symmetric multiprocessors; two-phase blocking; two-phase waiting algorithms; waiting time; Computer science; Data structures; Electronic switching systems; Magnetic heads; Parallel machines; Pattern analysis; Read only memory; Spinning; Switches; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing Symposium., Proceedings International, IPDPS 2002, Abstracts and CD-ROM
  • Conference_Location
    Ft. Lauderdale, FL
  • Print_ISBN
    0-7695-1573-8
  • Type

    conf

  • DOI
    10.1109/IPDPS.2002.1015592
  • Filename
    1015592