Improving Efficiency of IC Burn-In Testing

Burn-in (i.e., electronic test performed under elevated temperature and other stress conditions) plays an important role in integrated circuits (ICs) manufacturing process to ensure required high quality and reliability of the produced semiconductors before shipping them to final users. Burn-in aims at accelerating detection and screening out of so-called ´infant mortalities´ (early-life latent failures). It is normally associated with lengthy test time and high cost, often making it a bottleneck of the entire IC manufacturing process. It is no surprise therefore, that much attention and efforts have been dedicated towards possible ways of improving efficiency of the entire burn-in process. This paper looks at improving efficiency of practical burn-in testing process in the IC fabrication setting. The paper presents development of applied algorithms and relevant embedded software the burn-in and binning processes automation. In addition to the improved burn-in test efficiency, the developed tools lead also to yield improvement by providing more comprehensive test results data logging and analysis.