• DocumentCode
    1913984
  • Title

    Navigating an Evolutionary Fast Path to Exascale

  • Author

    Barrett, Richard F. ; Hammond, S.D. ; Vaughan, Courtenay T. ; Doerfler, D.W. ; Heroux, Michael A. ; Luitjens, J.P. ; Roweth, D.

  • Author_Institution
    Sandia Nat. Labs., Albuquerque, NM, USA
  • fYear
    2012
  • fDate
    10-16 Nov. 2012
  • Firstpage
    355
  • Lastpage
    365
  • Abstract
    The computing community is in the midst of a disruptive architectural change. The advent of manycore and heterogeneous computing nodes forces us to reconsider every aspect of the system software and application stack. To address this challenge there is a broad spectrum of approaches, which we roughly classify as either revolutionary or evolutionary. With the former, the entire code base is re-written, perhaps using a new programming language or execution model. The latter, which is the focus of this work, seeks a piecewise path of effective incremental change. The end effect of our approach will be revolutionary in that the control structure of the application will be markedly different in order to utilize single-instruction multiple-data/thread (SIMD/SIMT), manycore and heterogeneous nodes, but the physics code fragments will be remarkably similar. Our approach is guided by a set of mission driven applications and their proxies, focused on balancing performance potential with the realities of existing application code bases. Although the specifics of this process have not yet converged, we find that there are several important steps that developers of scientific and engineering application programs can take to prepare for making effective use of these challenging platforms. Aiding an evolutionary approach is the recognition that the performance potential of the architectures is, in a meaningful sense, an extension of existing capabilities: vectorization, threading, and a re-visiting of node interconnect capabilities. Therefore, as architectures, programming models, and programming mechanisms continue to evolve, the preparations described herein will provide significant performance benefits on existing and emerging architectures.
  • Keywords
    multi-threading; parallel architectures; performance evaluation; SIMD; SIMT; application control structure; application stack; architecture performance evaluation; code base; evolutionary approach; execution model; heterogeneous computing nodes; manycore computing nodes; node interconnect capabilities; physics code fragments; programming language; revolutionary approach; single-instruction multiple-data; single-instruction multiple-thread; system software; threading capability; vectorization capability; scientific applications; high performance computing; parallel architectures.;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Computing, Networking, Storage and Analysis (SCC), 2012 SC Companion:
  • Conference_Location
    Salt Lake City, UT
  • Print_ISBN
    978-1-4673-6218-4
  • Type

    conf

  • DOI
    10.1109/SC.Companion.2012.55
  • Filename
    6495837