Test vector encoding using partial LFSR reseeding

A new form of LFSR reseeding that provides higher encoding efficiency and hence greater reduction in test data storage requirements is described. Previous forms of LFSR reseeding have been static (i.e. test generation is stopped and the seed is loaded at one time) and have required full reseeding (i.e. n=r bits are used for an r-bit LFSR). The new form of LFSR reseeding proposed here is dynamic (i.e. the seed is incrementally modified while test generation proceeds) and allows partial reseeding (i.e. n<r bits can be used). Full static forms of LFSR reseeding are shown to be a special case of the new partial dynamic form of LFSR reseeding. In addition to providing better encoding efficiency, partial dynamic LFSR reseeding has a simpler hardware implementation than previous schemes based on multiple-polynomial LFSRs, and can generate each test vector in fewer clock cycles. Experimental results demonstrate the advantages of the new partial dynamic LFSR reseeding approach