Title :
A VLSI design of dual-loop automatic gain control for dual-mode QAM/VSB CATV modem
Author :
Shiue, Muh-Tian ; Huang, Kuang-Hu ; Lu, Cheng-Chang ; Wang, Chomg-Kuang ; Winston I.Way
Author_Institution :
Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan
fDate :
31 May-3 Jun 1998
Abstract :
A digitized automatic gain control (DAGC) whose loop bandwidth can be automatically regulated by a digital quantizer is presented in this paper. The designed quantizer that only costs tens of gates provides the DAGC both with wide loop bandwidth for fast acquisition and narrow loop bandwidth for low AGC gain jitter in stable steady-state. The receive bandpass filter, variable gain amplifier (VGA), and digital control circuits have been implemented in VLSI using 0.8 μm CMOS technology. For both 64-QAM and 8-VSB signals, the closed-loop experimental results show that the designed DAGC has input dynamic range from 229 mVpp to 456 mVpp, transient mode bandwidth 1 kHz, steady-state bandwidth 90 Hz, settling time of step response less than 2 ms using 10 MHz clock for digital control chip
Keywords :
CMOS integrated circuits; VLSI; automatic gain control; cable television; integrated circuit design; jitter; modems; quadrature amplitude modulation; quantisation (signal); 1 kHz; 10 MHz; 90 Hz; AGC gain jitter; CMOS technology; VLSI design; digital quantizer; digitized automatic gain control; dual-loop automatic gain control; dual-mode QAM/VSB CATV modem; input dynamic range; loop bandwidth; receive bandpass filter; settling time; steady-state bandwidth; transient mode bandwidth; variable gain amplifier; Band pass filters; Bandwidth; CMOS technology; Circuits; Costs; Digital control; Gain control; Jitter; Steady-state; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
DOI :
10.1109/ISCAS.1998.705318
