Reliability of 0.35 μm Devices: Impact of Ultra-Shallow LDD-Source/Drains

Deep submicron MOSFETs with ultra shallow LDD junctions display a new mode of degradation previously not observed. The evolution of the substrate current with hot carrier stress is identified as a sensitive parameter for the degradation of ultra-shallow LDD devices. The cause for this new degradation mode is due to the fact that the oxide damage created during stress affects the field and current distribution over the entire shallow LDD junction. The substrate current degradation appears to be the result of positive charge build-up in a first stage followed by negative oxide charge formation in the drain-gate region, which explains the slower than expected degradation rate of sub-0.5μm MOSFETs with ultra-shallow LDD junctions.