Distributed Bus Arbitration Algorithm Comparison on FPGA Based MPEG-4 Multiprocessor SoC

The communication is predicted to pass the computation as the limiting factor of performance of complex digital circuits. The most common communication medium is a shared bus. The contemporary buses have evolved as the requirements for the communication have increased. The new properties of the buses affect also the arbitration schemes. In this paper, the authors present a study on distributed arbitration with an advanced on-chip bus, HIBI. MPEG-4 video encoder is used as a test case. The compared arbitration algorithms are round-robin, priority, their combination, and random, all with varying parameters. They are compared with different bus utilization ranging from 3% to 75% and limited transfer length. Results show that the arbitration algorithm may account for up to 60% increase in performance and different transfer lengths may increase the performance by 350%