Title :
Evaluation of Dual-Rail CMOS Logic Styles for Self-Timed Circuits
Author :
Sartori, Giovani H. ; Ribas, Renato P. ; Reis, André I.
Author_Institution :
PGMicro, Rio Grande do Sul Fed. Univ., Porto Alegre
Abstract :
This work evaluates different CMOS logic families for asynchronous circuit design. The comparison is focused on self-timed circuit using four-phase protocol and dual-rail encoding in functional blocks with completion detection. Seven single-output and three multiple-output logic families were compared through electrical simulations taking into account both 0.13mum and 90nm CMOS technologies
Keywords :
CMOS logic circuits; asynchronous circuits; integrated circuit design; phase coding; protocols; 0.13 micron; 90 nm; asynchronous circuit design; dual-rail CMOS logic circuit; dual-rail encoding; electrical simulations; four-phase protocol; functional blocks; self-timed circuits; Adders; Asynchronous circuits; CMOS logic circuits; CMOS technology; Circuit simulation; Clocks; Encoding; Logic circuits; Logic design; Propagation delay;
Conference_Titel :
Norchip Conference, 2006. 24th
Conference_Location :
Linkoping
Print_ISBN :
1-4244-0772-9
DOI :
10.1109/NORCHP.2006.329209
