Title :
Unequal error protection codes with two-level burst and capabilities
Author :
Namba, Kazuteru ; Fujiwara, Eiji
Author_Institution :
Graduate Sch. of Inf. Sci. & Eng., Tokyo Inst. of Technol., Japan
Abstract :
This paper presents the code which corrects single bit errors in any location of the word as well as 1-bit burst errors occurred in an important part of the word. The proposed code is designed by product of the parity check matrix of the 1-bit burst error correcting codes and the matrix which converts input unequal errors into equal errors. This paper also demonstrates the evaluation of the code, and presents the extended codes with two-level burst error correcting capabilities by interleaving
Keywords :
error correction codes; matrix algebra; ECC; UEP codes; error correcting codes; interleaving; parity check matrix; single bit errors; two-level bit error correcting capability; two-level burst error correcting capability; unequal error protection codes; Error correction codes; Fault tolerant systems; Very large scale integration;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 2001. Proceedings. 2001 IEEE International Symposium on
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7695-1203-8
DOI :
10.1109/DFTVS.2001.966782
