DocumentCode :
1916948
Title :
Cyber Laboratory for Hardware Logic Experiments: Realizing Real Life Experiences for Many Students at Remote Sites
Author :
Koike, Nobuhiko
Author_Institution :
Fac. of Comput. & Inf. Sci., Hosei Univ., Koganei, Japan
fYear :
2012
fDate :
25-27 Sept. 2012
Firstpage :
236
Lastpage :
240
Abstract :
Cyber Laboratory for FPGA-based logic design course is underdevelopment. It tries to realize real-life logic design and FPGA-run environments and to offer real-life experiences for students, irrelevant of whether they are at remote sites or at actual sites. It combines actual laboratories and remote laboratories to achieve efficient sharing of FPGA design/ evaluation platforms and efficient use of student PCs. It reduces the waiting time for platforms and improves the interactive performance. The use of the cloud storage realizes a smooth and seamless transferring of design files and experiment results. The hardware logic design course consists of the six stage design flow: logic design entry, logic simulation, Verilog-HDL logic synthesis, FPGA compilation, actual FPGA-run and post analysis. The student PC works as a remote desk top mode, when the laboratory platform is served as the actual laboratory mode, where the physical platform has to be used in an exclusive way. The student can enjoy comfortable design environments, but the total number is limited up to the available platforms. When the number of students exceeds the number of platforms, the use of remote laboratory services modes enables to accommodate many students to perform their experiments concurrently in almost the same way as the actual laboratory. The FPGA platforms accept the Verilog-HDL synthesis services and the FPGA setup/ run services in the form of the Web services. Requests are serviced in time and space division fashions. As for the time consuming tasks, i.e. the logic design entry/ simulation and FPG compilation, these tasks can be run on student PCs in order to off-load the platforms´ works. So an efficient sharing of platforms can be achieved. This can also improve interactive performance especially at design entry/ simulation time. At the final post analysis phase, students can remotely investigate the logic analyzer measured results which were obtained at the previous run phase. The m- dern PC-based logic analyzer allows such measurements and stores them in the cloud storage for students to replay the experiments on their own PCs. As design, configuration and result files are transferred via cloud storage, it becomes easy to migrate among different laboratory modes in the Cyber laboratory.
Keywords :
Web services; cloud computing; computer aided instruction; educational courses; electronic engineering education; field programmable gate arrays; hardware description languages; logic CAD; logic analysers; logic simulation; storage management; virtual instrumentation; Cyber laboratory; FPGA compilation; FPGA services; FPGA setup; FPGA-based logic design course; PC-based logic analyzer; Verilog-HDL logic synthesis; Web services; actual FPGA-run; cloud storage; design files; design flow; hardware logic design course; interactive performance; logic design entry; logic design simulation; real-life logic design; remote desk top mode; remote laboratories; remote laboratory service modes; space division; student PC; time division; Cloud computing; Field programmable gate arrays; Hardware; Hardware design languages; Remote laboratories; Cloud Storage; FPGA logic design; PC clusters; Remote Laboratory; Verilog-HDL; Virtual Machine; Web Services;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Cyberworlds (CW), 2012 International Conference on
Conference_Location :
Darmstadt
Print_ISBN :
978-1-4673-2736-7
Type :
conf
DOI :
10.1109/CW.2012.41
Filename :
6337426
Link To Document :
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