DocumentCode :
1917192
Title :
The Study of PMOS Vth Distribution Using Process and Device Simulations and C-V Measurements
Author :
Hadzi-Vukovic, Jovan ; Jevtic, Milan
Author_Institution :
Infineon Technol., Villach
Volume :
1
fYear :
2005
fDate :
21-24 Nov. 2005
Firstpage :
871
Lastpage :
874
Abstract :
Measurements of threshold voltage (Vth) of PMOS transistors with buried channel realized in 0.8mum CMOS technology give large spread of the threshold values. To understand the spread of V th we use C-V measurements to obtain doping profile in channel region, and process and device simulations to simulate the experimental results. A good agreement between the experimental results and simulation shows that the spread of Vth originates from different doping profiles in channel region
Keywords :
CMOS digital integrated circuits; MOSFET; buried layers; doping profiles; voltage measurement; 0.8 micron; C-V measurement; CMOS technology; PMOS transistor; buried channel region; complementary metal oxide semiconductor; device process simulation; doping profile; p-channel metal oxide semiconductor; threshold voltage adjustment; threshold voltage distribution; threshold voltage measurement; Boron; CMOS process; CMOS technology; Capacitance-voltage characteristics; Doping profiles; Implants; MOS devices; Medical simulation; Threshold voltage; Voltage measurement; C-V measurements; buried channel; shallow junction; threshold voltage adjustment;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer as a Tool, 2005. EUROCON 2005.The International Conference on
Conference_Location :
Belgrade
Print_ISBN :
1-4244-0049-X
Type :
conf
DOI :
10.1109/EURCON.2005.1630073
Filename :
1630073
Link To Document :
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