Title :
Survivable self-checking sequential circuits
Author :
Levin, I. ; Matrosova, A. ; Ostanin, S.
Author_Institution :
Tel Aviv Univ., Israel
Abstract :
This paper presents a method for designing totally self-checking synchronous sequential circuits (SSC), and investigates their behavior in presence of transient faults. We deal with the case when the circuit is able to recover after the number of clocks. We call SSC owing this property as a survivable SSC. A concept of a partially monotonous SSC is developed in the paper. It is proven that the partially monotonous SSCs are survivable
Keywords :
automatic testing; design for testability; integrated circuit reliability; logic design; logic testing; reliability theory; sequential circuits; transients; partially monotonous SSC; self checking synchronous sequential circuits; survivable SSC; transient faults; Fault tolerant systems; Sequential circuits; Very large scale integration;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 2001. Proceedings. 2001 IEEE International Symposium on
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7695-1203-8
DOI :
10.1109/DFTVS.2001.966793
