Title :
HiPCrypto: a high-performance VLSI cryptographic chip
Author :
Salomao, S.L.C. ; Alves, Vladimir C. ; Filho, Eliseu M C
Author_Institution :
Dept. of Electr. Eng., Mil. Inst. of Eng., Rio de Janeiro, Brazil
Abstract :
Data security is an important issue in today´s computer networks. This paper presents the HiPCrypto chip, which implements the IDEA cryptographic algorithm. HiPCrypto is oriented towards computer network applications demanding high throughput. Its architecture exploits both the spatial and the temporal parallelism available in the IDEA algorithm. When operating at a 53 MHz clock, HiPCrypto can encrypt/decrypt at data rates up to 3.4 Gbps
Keywords :
VLSI; application specific integrated circuits; cryptography; 3.4 Gbit/s; 53 MHz; HiPCrypto; IDEA cryptographic algorithm; VLSI cryptographic chip; computer network applications; data rates; data security; temporal parallelism; throughput; Application software; Computer networks; Cryptographic protocols; Cryptography; Data security; Graphics; Military computing; Throughput; Very large scale integration; Virtual private networks;
Conference_Titel :
ASIC Conference 1998. Proceedings. Eleventh Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-4980-6
DOI :
10.1109/ASIC.1998.722785
