• DocumentCode
    1917658
  • Title

    Discussions on the CORDIC processor using leading zeros detector

  • Author

    Juang, Tso-Bing ; Hsiao, Shen-Fu

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
  • fYear
    2000
  • fDate
    27-29 Feb. 2000
  • Firstpage
    175
  • Lastpage
    178
  • Abstract
    In this paper the application of CORDIC (COordinate Rotation DIgital Computer) processor using leading zeros detector (LZD) is discussed. In previous research, LZD was used in the normalization of the floating point number computation, also we find that it can be used in the CORDIC processor for reducing the number of iterations, deciding the sign of redundant number and speeding the computation of the exponent.
  • Keywords
    digital arithmetic; digital signal processing chips; poles and zeros; CORDIC processor; exponent computation; leading zeros detector; redundant number sign; Computer science; Detectors; Equations; Logic functions; Logic gates; Signal generators; Sun;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Mixed-Signal Design, 2000. SSMSD. 2000 Southwest Symposium on
  • Conference_Location
    San Diego, CA, USA
  • Print_ISBN
    0-7803-5975-5
  • Type

    conf

  • DOI
    10.1109/SSMSD.2000.836468
  • Filename
    836468
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1917658