DocumentCode :
1917700
Title :
On the implementation of a space time block coded transmitter in an FPGA platform
Author :
Anguiano, R.C. ; Galaviz, G. ; Andrade, A.G.
Author_Institution :
Univ. Autonoma de Baja California, Mexicali
fYear :
2008
fDate :
24-26 April 2008
Firstpage :
324
Lastpage :
328
Abstract :
This paper presents the implementation of a digital communications transmitter that includes a space time block encoder in an APEX20KE FPGA device from Altera. The developed transmitter includes oscillators that provide passband I-Q modulation. The complete transmitter design is appropriate for evaluation of space time block codes as well as different digital passband modulation schemes. With the reconfigurable properties of FPGA´s, evaluations and new designs can be developed easily in a hardware platform. The implementation of the proposed transmitter is described, as well as the tools used in its development. The transmitter can be used as a standalone unit in a single FPGA, or as an element of a complete communication system for on-chip emulation.
Keywords :
block codes; digital communication; field programmable gate arrays; modulation; oscillators; space-time codes; APEX20KE FPGA device; FPGA platform; digital communications transmitter; digital passband modulation schemes; on-chip emulation; passband I- Q modulation; space time block encoder; Block codes; Digital communication; Digital modulation; Field programmable gate arrays; Hardware; Modulation coding; Oscillators; Passband; System-on-a-chip; Transmitters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Wireless Telecommunications Symposium, 2008. WTS 2008
Conference_Location :
Pomona, CA
ISSN :
1934-5070
Print_ISBN :
978-1-4244-1869-5
Electronic_ISBN :
1934-5070
Type :
conf
DOI :
10.1109/WTS.2008.4547583
Filename :
4547583
Link To Document :
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