Title :
DRAM Cell with High Signal Charge and Small Storage Capacitance Using the Gain Concept
fDate :
11-13 September 2000
Keywords :
CMOS process; CMOS technology; Design automation; Diodes; High K dielectric materials; MOS capacitors; MOSFETs; Parasitic capacitance; Random access memory; Voltage;
Conference_Titel :
Solid-State Device Research Conference, 2000. Proceeding of the 30th European
Print_ISBN :
2-86332-248-6
DOI :
10.1109/ESSDERC.2000.194748
