Ternary simulation of digital systems in CAD programmable logic

Here is considered the problems of interpretative and compilation simulation of digital systems. Investigated the influence of logic transformation of gate models. Offered procedures, which modify the method of ternary simulation and avoid incorrect execution of direct implication in the cubic coverage of the given gate structure. Here is some examples, which describe digital systems of gate and functional levels, its usage in realization of interpretative and compilation algorithm of simulation in the CAD programmable logic.