Title :
Oxide Thickness Scaling Limit for Optimum CMOS Logic Circuit Performance
Author :
Bowman, Keith A. ; Wang, Lihui ; Tang, Xinghai ; Meindl, James D.
Author_Institution :
Georgia Institute of Technology, Atlanta, GA, USA
fDate :
11-13 September 2000
Keywords :
CMOS logic circuits; CMOS technology; Circuit optimization; Constraint optimization; Contracts; Mathematical model; Performance analysis; Power MOSFET; Threshold voltage; Tunneling;
Conference_Titel :
Solid-State Device Research Conference, 2000. Proceeding of the 30th European
Print_ISBN :
2-86332-248-6
DOI :
10.1109/ESSDERC.2000.194774
