• DocumentCode
    1919386
  • Title

    A Novel ESD Protection Technique for Submicron CMOS Technologies

  • Author

    Kwon, K.H. ; Park, H.R. ; Kim, D.G. ; Park, K.S. ; Jin, J.H. ; Choi, K.H.

  • Author_Institution
    MICRO Process Development Team, R&D Center, SAMSUNG Electronics Co. Ltd, Buchun, Korea
  • fYear
    1994
  • fDate
    11-15 Sept. 1994
  • Firstpage
    417
  • Lastpage
    420
  • Abstract
    In this paper, we present a novel electrostatic discharge (ESD) protection device which is, against the catastrophic ESD attack, activated as either a reverse-biased punchthrough bipolar junction transistor (BJT) or a forward-biased diode, depending on the polarity of the input pulse. Experimental data show that the new device is more efficient and area-effective than any other conventional one. It also does not cost any extra mask for its realization because of the compatibility with established process. Thus we believe that it is a viable approach for the protection of the scaled CMOS devices and circuits vulnerable to the ESD stress.
  • Keywords
    CMOS technology; Circuits; Diodes; Electrostatic discharge; MOSFETs; Medical simulation; Protection; Stress; Transistors; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Device Research Conference, 1994. ESSDERC '94. 24th European
  • Conference_Location
    Edinburgh, Scotland
  • Print_ISBN
    0863321579
  • Type

    conf

  • Filename
    5435749