Enhanced dual-path compensated amplifier for driving large capacitive load

Author

Vieru, Razvan G. ; Ghinea, Romeo ; Goras, Liviu

Author_Institution

Signals, Circuits & Syst. Lab., Gheorghe Asachi Tech. Univ. of Iasi, Iasi, Romania

fYear

2010

fDate

11-12 Nov. 2010

Firstpage

39

Lastpage

42

Abstract

This paper presents an improved amplifier compensation scheme for driving large capacitive loads. The dual-path compensated amplifier topology requires two parallel high speed paths for signal propagation and offers better performances than previously reported compensation schemes. The goal of this work was to improve this type of architecture in order to achieve lower power consumption, bandwidth extension and slew rate improvement, while reducing the compensation capacitors size and, therefore, the overall chip area.

Keywords

amplifiers; capacitors; low-power electronics; amplifier compensation scheme; bandwidth extension; chip area; compensation capacitors; dual-path compensated amplifier topology; enhanced dual-path compensated amplifier; large capacitive load; lower power consumption; signal propagation; slew rate improvement; Bandwidth; CMOS integrated circuits; CMOS technology; Capacitors; Frequency response; Topology; Transistors; damping factor control; dual path; frequency compensation; multistage amplifier;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics and Telecommunications (ISETC), 2010 9th International Symposium on

Conference_Location

Timisoara

Print_ISBN

978-1-4244-8457-7

Type

conf

DOI

10.1109/ISETC.2010.5679344

Filename

5679344