DocumentCode :
1919466
Title :
System-level co-design methodology based on platform design flow for system-on-chip
Author :
Quan, Wen
Author_Institution :
Dept. of Manage. Eng., Southeast Univ., Nanjing
fYear :
2006
fDate :
17-19 Nov. 2006
Firstpage :
1
Lastpage :
4
Abstract :
Synthesis methods are important elements in platform-based design methodologies. This paper addresses platform-based design for system-on-chip (SoC). It takes hardware/software co-design and high level design reuse as keys to SoCs design. Particularly, it uses existing designs as starting points for new system implementations and put more stress on system level reuse. First, it introduces a system level co-exploration methodology and analyzes a typical platform-based design flow. Then it gives performance analysis and proposes a revised platform-based design flow. To support design technology innovations, several synthesis issues are discussed, such as platform reuse and configurable architecture. It also presents market-oriented views and introduces synthesis tools to support the co-design methodology
Keywords :
hardware-software codesign; system-on-chip; SoC design; configurable architecture; hardware/software co-design; high level design reuse; high level synthesis method; market-oriented view; platform-based design flow; system level co-exploration methodology; system-level co-design methodology; system-on-chip design; Application specific integrated circuits; Computer architecture; Costs; Design engineering; Design methodology; Driver circuits; Hardware; Intellectual property; System-level design; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Industrial Design and Conceptual Design, 2006. CAIDCD '06. 7th International Conference on
Conference_Location :
Hangzhou
Print_ISBN :
1-4244-0683-8
Electronic_ISBN :
1-4244-0684-6
Type :
conf
DOI :
10.1109/CAIDCD.2006.329471
Filename :
4127106
Link To Document :
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