• DocumentCode
    1919878
  • Title

    On the Charge Build-Up Mechanisms in Very Thin Insulator Layers

  • Author

    Vincent, E. ; Papadas, C. ; Riva, C. ; Pio, F. ; Ghibaudo, G.

  • Author_Institution
    SGS-Thomson Microelectronics, Central R&D, BP 16, 38921 Crolles, France; Laboratoire de Physique des Composants Ã\xa0 Semiconducteurs, ENSERG, BP 257, 38047 Grenoble, France
  • fYear
    1994
  • fDate
    11-15 Sept. 1994
  • Firstpage
    495
  • Lastpage
    498
  • Abstract
    The volume degradation features of very thin tunnel oxide layers will be deeply analyzed and the validity of the following issues will be demonstrated quantitatively: i) only negative charge builds-up in the bulk of the insulator layer, ii) for a given oxide thickness and gate stress polarity breakdown occurs as soon as the negative trapped bulk oxide charge density attains a critical value, iii) the stress-induced bulk oxide charge distribution centroid displacement direction does not depend on the insulator thickness and iv) independently of the insulator thickness, the stress-induced evolution of the bulk oxide trapping properties can be explained with a generalized power degradation law. Furthermore, the breakdown parameters of these thin films will be studied in details.
  • Keywords
    Breakdown voltage; Capacitors; Degradation; EPROM; Electric breakdown; Insulation; Microelectronics; Nonvolatile memory; Research and development; Stress;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Device Research Conference, 1994. ESSDERC '94. 24th European
  • Conference_Location
    Edinburgh, Scotland
  • Print_ISBN
    0863321579
  • Type

    conf

  • Filename
    5435767