Title :
Design of a slew rate controlled output buffer
Author :
Garcia, E. ; Coll, P. ; Anvergne, D.
Author_Institution :
ATMEL, Rousset, France
Abstract :
Due to the wide range of IC operating conditions, designing I/O drivers does not constitute a trivial task. Output ringing due to over-drive as well as power noise due to simultaneous switching of output drivers must be avoided. A structure of an output driver is proposed that uses capacitance feedback to control the output slew, reducing the power noise. The transition time of the resulting driver is shown to be constant over a large range of output loading conditions. A description is given of a driver implemented in a 0.8 μm CMOS technology
Keywords :
CMOS digital integrated circuits; buffer circuits; capacitance; circuit feedback; delay estimation; driver circuits; integrated circuit noise; 0.8 micron; CMOS technology; I/O drivers; capacitance feedback; constant transition time; output driver; power noise reduction; simultaneous switching; slew rate controlled output buffer; CMOS technology; Crosstalk; Driver circuits; Electromagnetic interference; Noise reduction; Output feedback; Power supplies; Propagation delay; Rails; Voltage control;
Conference_Titel :
ASIC Conference 1998. Proceedings. Eleventh Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-4980-6
DOI :
10.1109/ASIC.1998.722821
