A VHDL CAN Module for Smart Sensors

Communication modules are required for smart sensors interface with the sensor network. In this paper, a VHDL (VHSIC hardware description language) implementation of a CAN (controller area network) interface for smart sensors is presented. The scope of this paper is the medium access control (MAC) sublayer. Therefore, it deals with the transfer protocol, control of frames, arbitration, error checking and error signaling. In accordance with the CAN protocol (versions 2.0 A and 2.0 B), the interface can be divided into blocks to perform various communication tasks. In the implementation presented in this work, each block is a VHDL project entity described in the behavioral style. The performance of each entity is analyzed separately. Next, all entities are interconnected in the structural style. The final description has been synthesized into a Xilinxreg Spartan-Il XC2S50 FPGA. Finally, a comparison between this implementation and the HurriCANe, a freely available core, is performed.