65 nm Transistors for a 90 nm CMOS SOC Platform

Author

Mirabedini, M.R. ; Gopinath, V.P. ; Kamath, A. ; Lee, M.Y. ; Yeh, W.C.

Author_Institution

LSI Logic Corporation, Santa Clara, USA

fYear

2002

fDate

24-26 September 2002

Firstpage

131

Lastpage

134

Keywords

Boron; CMOS logic circuits; CMOS process; CMOS technology; Dielectric devices; Implants; Leakage current; Nickel; Silicides; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Device Research Conference, 2002. Proceeding of the 32nd European

Print_ISBN

88-900847-8-2

Type

DOI

10.1109/ESSDERC.2002.194887

Filename

1503817

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