DocumentCode
1921684
Title
Development Tools for Partial Reconfigurable Systems
Author
Filho, Filippo Valiante ; Horta, Edson Lemos
Author_Institution
Lab. of Integrated Syst., Univ. de Sao Paulo, Sao Paulo
fYear
2008
fDate
26-28 March 2008
Firstpage
249
Lastpage
252
Abstract
Some types of FPGA (field programmable gate array) can be partially reconfigured during run-time forming a partial reconfigurable system (PRS). The use of PRSs brings several advantages like cost and power consumption reduction but needs appropriate development tools. This paper describes the available tools, classifies them and compares the principal ones.
Keywords
field programmable gate arrays; reconfigurable architectures; FPGA; development tools; field programmable gate array; partial reconfigurable systems; run-time forming; Costs; Equations; Field programmable gate arrays; Filters; Graphical user interfaces; Hardware design languages; Laboratories; Manufacturing; Programmable logic arrays; Runtime;
fLanguage
English
Publisher
ieee
Conference_Titel
Programmable Logic, 2008 4th Southern Conference on
Conference_Location
San Carlos de Bariloche
Print_ISBN
978-1-4244-1992-0
Type
conf
DOI
10.1109/SPL.2008.4547769
Filename
4547769
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