Title :
Design and implementation of a programmable bit-rate multipulse excited LPC vocoder for digital cellular radio applications
Author :
Poornaiah, D.V. ; Mohan, P. V Anaitda ; Chadchan, Sanjeev M.
Author_Institution :
DSP Group, Indian Telephone Ind., Bangalore, India
Abstract :
We present the algorithm for design of an analysis-by-synthesis based multi-pulse excited/long-term prediction type LPC speech coder and discuss its real-time implementation using the state-of-art ADSP 2101 digital signal processor. The important features of this speech coder are attributed to the use of (i) an efficient search algorithm for computing the pulse locations and amplitudes involved, (ii) sigma-delta based 16-bit codec-filter VLSI chip: AD 28msp 0.2 acting as front and back ends (iii) perceptual weighting filter and (iv) an efficient output post-processing filter. A detailed objective and subjective evaluation of the speech coder is carried out
Keywords :
digital radio; 16 bit; AD 28msp 0.2; ADSP 2101 digital signal processor; VLSI chip; algorithm; analysis-by-synthesis speech coder; design; digital cellular radio applications; long-term prediction speech coder; multipulse excited LPC vocoder; objective evaluation; output post-processing filter; perceptual weighting filter; programmable bit-rate vocoder; pulse amplitudes; pulse locations; real-time implementation; search algorithm; sigma-delta codec-filter chip; subjective evaluation; Algorithm design and analysis; Digital signal processors; Filters; Linear predictive coding; Signal analysis; Signal design; Signal processing algorithms; Speech analysis; Speech codecs; Speech processing;
Conference_Titel :
Personal Wireless Communications, 1994., IEEE International Conference on
Conference_Location :
Bangalore
Print_ISBN :
0-7803-1996-6
DOI :
10.1109/ICPWC.1994.567944
