• DocumentCode
    1924873
  • Title

    Multiplication by complements

  • Author

    Dave, V. ; Coulston, C.

  • Author_Institution
    Electr. Eng., Colorado Sch. of Mines, Golden, CO, USA
  • fYear
    2012
  • fDate
    27-29 Feb. 2012
  • Firstpage
    153
  • Lastpage
    156
  • Abstract
    An innovative multiplication method is proposed which solves the problem of finding the product of two unsigned binary numbers by forming successively smaller one´s complements of the operands. The foundation of the algorithm lies in an ancient Vedic algorithm for multiplication. The Vedic multiplication algorithm is adapted to operate on binary numbers. The correctness of the method is demonstrated formally and translated into hardware. The resulting n-bit multiplier architecture consists of n-stages, each stage reducing the size of the operands by 1-bit.
  • Keywords
    digital arithmetic; Vedic multiplication algorithm; innovative multiplication method; n-bit multiplier architecture; operand complements; unsigned binary numbers; Adders; Algorithm design and analysis; Arrays; Delay; Hardware; Organizations;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Communications and Computers (CONIELECOMP), 2012 22nd International Conference on
  • Conference_Location
    Cholula, Puebla
  • Print_ISBN
    978-1-4577-1326-2
  • Type

    conf

  • DOI
    10.1109/CONIELECOMP.2012.6189900
  • Filename
    6189900