DocumentCode :
1926570
Title :
Implementation of 32-bit Ling and Jackson adders
Author :
Keeter, Matthew ; Harris, David Money ; Macrae, Andrew ; Glick, Rebecca ; Ong, Madeleine ; Schauer, Justin
Author_Institution :
Harvey Mudd Coll., Claremont, CA, USA
fYear :
2011
fDate :
6-9 Nov. 2011
Firstpage :
170
Lastpage :
175
Abstract :
Ling adders factor complexity out of the first stage of an adder to shorten the critical path. In 2004, Jackson and Talwar proposed a generalization of the Ling adder that reduces the complexity of the critical generate path at the expense of increased complexity in the propagate logic. This paper compares implementations of 32-bit Ling and Jackson adders to the optimized Sklansky architecture produced by Design Compiler in a 45 nm process. The Ling adder is 3% faster and uses 7% less energy, achieving a delay of 8.3 FO4 inverters. The Jackson adder is only 1% faster and uses 45% more energy. However, this is the first published implementation of a Jackson adder with all details shown.
Keywords :
adders; circuit complexity; 32-bit Jackson adders; 32-bit Ling adders; Ling adder factor complexity; critical path complexity; propagate logic complexity; Adders; Complexity theory; Computer architecture; Delay; Inverters; Logic gates; Microprocessors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems and Computers (ASILOMAR), 2011 Conference Record of the Forty Fifth Asilomar Conference on
Conference_Location :
Pacific Grove, CA
ISSN :
1058-6393
Print_ISBN :
978-1-4673-0321-7
Type :
conf
DOI :
10.1109/ACSSC.2011.6189978
Filename :
6189978
Link To Document :
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