DocumentCode :
1926620
Title :
Automatic extraction of the control flow machine and application to evaluating coverage of verification vectors
Author :
Hoskote, Yatin V. ; Moundanos, Dinos ; Abraham, Jacob A.
Author_Institution :
Comput. Eng. Res. Center, Texas Univ., Austin, TX, USA
fYear :
1995
fDate :
2-4 Oct 1995
Firstpage :
532
Lastpage :
537
Abstract :
Simulation is still the primary, although inadequate, resource for verifying the conformity of a design to its functional specification. Fortunately, most errors in the early stages of design involve only the control flow in the circuit. We define the functional coverage of a given sequence of verification vectors as the amount of control behavior exercised by them. We present a novel technique for automatically extracting the control flow of a design on the basis of the underlying mathematical model. Significantly, this extraction is independent of the circuit description style. The Extracted Control Flow Machine (ECFM) is then used for estimation of functional coverage and to provide information that will help the designer improve the quality of his or her tests
Keywords :
circuit analysis computing; digital simulation; formal verification; logic testing; control flow machine; design verification; functional specification; verification vectors; Application software; Automatic control; Circuit faults; Computational modeling; Data mining; Error correction; Hardware design languages; Jacobian matrices; State-space methods; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1995. ICCD '95. Proceedings., 1995 IEEE International Conference on
Conference_Location :
Austin, TX
ISSN :
1063-6404
Print_ISBN :
0-8186-7165-3
Type :
conf
DOI :
10.1109/ICCD.1995.528919
Filename :
528919
Link To Document :
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