DocumentCode :
1926764
Title :
Health monitoring method for load assessment in reliability design of printed circuit board
Author :
Hirohata, Kenji ; Hisano, Katsumi ; Hisakuni, Yosuke ; Omori, Takahiro ; Mukai, Minoru
Author_Institution :
Corp. R&D Center, Toshiba Corp., Kawasaki, Japan
fYear :
2010
fDate :
24-26 Aug. 2010
Firstpage :
1
Lastpage :
4
Abstract :
Health monitoring technologies, which can evaluate the performance degradation, load history and degree of fatigue, have the potential to improve the maintenance, the reliability design method and the availability in improper use conditions of electronic equipment. In this paper, we propose a method to assess the cooling performance degradation and load history of printed circuit boards by use of a hierarchical Bayes model based on CAE results of stress simulation and experiment data from actual measurements. We applied this method to note PC. It is confirmed that this method can estimate the structural response index distribution of the printed circuit board from monitoring variables, and that the statistical load assessment concerning cyclic load and the maximum load distribution can be conducted.
Keywords :
Bayes methods; computer aided engineering; condition monitoring; fatigue; printed circuit design; statistical analysis; CAE; cooling performance degradation; electronic equipment; fatigue; health monitoring method; hierarchical Bayes model; load history; printed circuit board; reliability design; statistical load assessment; stress simulation; structural response index distribution; Analytical models; Cooling; Data models; History; Load modeling; Monitoring; Strain;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
CPMT Symposium Japan, 2010 IEEE
Conference_Location :
Tokyo
Print_ISBN :
978-1-4244-7593-3
Type :
conf
DOI :
10.1109/CPMTSYMPJ.2010.5679665
Filename :
5679665
Link To Document :
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