Title :
An ultra low power encoder for 5 bit flash ADC
Author :
Lavania, Y. ; Varghese, G.T. ; Mahapatra, Kamala Kanta
Author_Institution :
Nat. Inst. of Technol., Rourkela, India
Abstract :
This investigation suggests a low power encoding scheme proposed for 4GS/s 5 bit flash analog to digital converter. One of the demanding issues in the design of a low power flash ADC is the design of thermometer code to binary code. An encoder in this paper converts the thermometer code into binary code without any intermediate stage. To decrease the power consumption of the encoder, the implementation is done using dynamic CMOS logic. The proposed encoder is designed using 90 nm technology at 1.2 V power supply using CADENCE tool. The simulation results shown for a sampling frequency of 4GHz and the average power dissipation of the encoder is 1.833 μW.
Keywords :
CMOS logic circuits; analogue-digital conversion; binary codes; low-power electronics; CADENCE tool; analog-todigital converter; binary code; dynamic CMOS logic; frequency 4 GHz; low-power encoding scheme; low-power flash ADC; power 1.833 muW; power consumption; power dissipation; sampling frequency; size 90 nm; thermometer code; ultralow power encoder; voltage 1.2 V; CMOS integrated circuits; Clocks; Heating; Inverters; Transistors; Analog to digital converter; Dynamic CMOS logic; Flash ADC;
Conference_Titel :
Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT), 2013 International Conference on
Conference_Location :
Tiruvannamalai
Print_ISBN :
978-1-4673-5300-7
DOI :
10.1109/ICEVENT.2013.6496578