Title :
Through co-design to optimize power delivery distribution system using embedded discrete de-coupling capacitor
Author :
Wang, Chen-Chao ; Cheng, Hung-Hsiang ; Chiu, Chi-Tsung ; Hung, Chih-Pin ; Kuo, Chih-Wen ; Kitazawa, Toshihide
Author_Institution :
Electr. Lab., Adv. Semicond. Eng. Inc., Kaohsiung, Taiwan
Abstract :
As clock speeds increase into the gigahertz regime and rise times decrease into the pico-second regime, the interaction between capacitors and power/ground planes of a package, or board on which they are mounted becomes vitally important to the performance of a power delivery system. Capacitors pose the biggest challenge for integration in packages due to the large capacitance required for decoupling high performance circuits. Although Embedded Passive Substrate (EPS) using thin-film technique was addressed and developed, the actually application without substrate packaging layer increased is difficult. An Embedded Discrete Passive Substrate (EDPS) technology is increasingly drawing attention because of its potentials in addressing system cost reduction by offering smaller size form factor with high level of integration in packaging. In this paper, a embedded discrete capacitor structure was designed and fabricated on organic substrate packaging. Through early engagement and optimization on substrate packaging design, the embedded discrete capacitors could improve the electrical performance of core power distribution system. To validate the feasibility, a test substrate packaging is built. In addition, the simulation results of core power distribution system with EPDS and Copper Wire-Bond (CWB) on time-domain and frequency-domain demonstrate the electrical performance is better than others.
Keywords :
copper; lead bonding; packaging; thin film devices; time-frequency analysis; capacitors; co-design; copper wire-bond; core power distribution system; embedded discrete capacitor structure; embedded discrete de-coupling capacitor; embedded discrete passive substrate technology; frequency-domain; gigahertz regime; organic substrate packaging; pico-second regime; power delivery distribution system; power delivery system; substrate packaging design; system cost reduction; test substrate packaging; thin-film technique; time-domain; Capacitance; Capacitors; Copper; Impedance; Packaging; Simulation; Substrates;
Conference_Titel :
CPMT Symposium Japan, 2010 IEEE
Conference_Location :
Tokyo
Print_ISBN :
978-1-4244-7593-3
DOI :
10.1109/CPMTSYMPJ.2010.5679676