DocumentCode :
1928247
Title :
Strain Relaxation Due to Phosphorus Implantation into Strained Si/SiGe/Si Heterostructure
Author :
Swain, PK ; Misra, D.
Author_Institution :
Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ 07102-1982
fYear :
1996
fDate :
9-11 Sept. 1996
Firstpage :
587
Lastpage :
590
Abstract :
Ion implantation has been established as an important process tool to introduce precise amount of dopants into semiconductors. However, it is known to create several defects in the form of point defects and misfit dislocations. Annealing is generally performed to achieve dopant activation which also minimizes channeling tails and decrease residual extended defect densities. In this paper we have reported the annealing behavior of phosphorus implanted into strained SiGe layer at room temperature. The implantation was performed at 155 KeV with a dose of 1 × 1014/cm2. Post implantation annealing was performed at 600, 700, 800 and 900°C for 10 seconds in a Rapid Thermal Process furnace. I-V, C-V and DLTS measurements hint towards presence of permanent dislocation loops created as a consequence of implantation and annealing.
Keywords :
Capacitance-voltage characteristics; Capacitive sensors; Furnaces; Germanium silicon alloys; Ion implantation; Rapid thermal annealing; Rapid thermal processing; Silicon germanium; Tail; Temperature;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Device Research Conference, 1996. ESSDERC '96. Proceedings of the 26th European
Conference_Location :
Bologna, Italy
Print_ISBN :
286332196X
Type :
conf
Filename :
5436148
Link To Document :
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