Integration of CMOS-electronics in an SOI layer on high-resistivity silicon substrates

Author

Dierickx, B. ; Alaerts, A. ; Debusschere, I. ; Simoen, Eddy ; Vlummens, J. ; Claeys, Cor ; Maes, Hannes ; Hermans, L. ; Heijne, Erik H. M. ; Jarron, Pierre ; Anghinolfi, Francis ; Aspell, P. ; Campbell, Malachy ; Pengg, Franz Xaver ; Bosisio, Luciano ; Fo

Author_Institution

IMEC, Leuven

fYear

1992

fDate

25-31 Oct 1992

Firstpage

414

Abstract

The monolithic integration of electronics and high-resistivity silicon detectors is reported. The approach is based on CMOS circuit integration in the top layer of high-resistivity SOI (silicon-on-insulator) wafers. In a preliminary feasibility study, high-resistivity wafers were subjected to SOI layer fabrication methods and evaluated with a simple diode process for two main characteristics: diode leakage and possible dopant concentration increase. In the second phase of the project, a full SOI-on-HΩ process was executed. MOSFET behavior was then evaluated

Keywords

CMOS integrated circuits; insulated gate field effect transistors; nuclear electronics; semiconductor counters; semiconductor diodes; substrates; CMOS circuit integration; MOSFET; SOI layer; SOI-on-HΩ process; Si detectors; Si on insulator; diode leakage; dopant concentration; high resistivity Si substrates; monolithic integration; CMOS logic circuits; CMOS process; CMOS technology; Conductivity; Diodes; Hybrid intelligent systems; MOSFET circuits; Optical device fabrication; Radiation detectors; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Nuclear Science Symposium and Medical Imaging Conference, 1992., Conference Record of the 1992 IEEE

Conference_Location

Orlando, FL

Print_ISBN

0-7803-0884-0

Type

conf

DOI

10.1109/NSSMIC.1992.301276

Filename

301276