DocumentCode
1929921
Title
Application-Level Memory Optimization for MPSoC
Author
Girodias, B. ; Bouchebaba, Y. ; Nicolescu, G. ; Aboulhamid, E.M. ; Paulin, P. ; Lavigueur, B.
Author_Institution
Ecole Polytech. de Montreal, Que.
fYear
2006
fDate
14-16 June 2006
Firstpage
169
Lastpage
178
Abstract
Multiprocessor system-on-chip is one of the main drivers of the semiconductor industry revolution by enabling the integration of complex functionality on a single chip. Memory is becoming a key player for significant improvements in embedded systems (power, performance and area). With the emergence of more embedded multimedia applications in the industry, this issue becomes increasingly vital. These applications often use multi-dimensional arrays to store intermediate results during multimedia processing tasks. A couple of key optimization techniques exist and have been demonstrated on SoC architecture. This paper presents these techniques and their impact on a MPSoC environment and brings forward improvements. These techniques allow for optimization of memory space, reduction of the number of cache misses and extensive improvement of processing time extensively. In this paper´s case study, theses techniques yield an average increase of the data cache hit rate by 20% and an average decrease of processing time by 50%
Keywords
cache storage; multimedia systems; multiprocessing systems; system-on-chip; MPSoC; application-level memory optimization; data cache; multidimensional arrays; multimedia processing tasks; multiprocessor system-on-chip; Data processing; Electronics industry; Embedded system; Energy consumption; Multimedia systems; Multiprocessing systems; Paper technology; Space technology; Streaming media; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Rapid System Prototyping, 2006. Seventeenth IEEE International Workshop on
Conference_Location
Chania, Crete
ISSN
1074-6005
Print_ISBN
0-7695-2580-6
Type
conf
DOI
10.1109/RSP.2006.8
Filename
1630766
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