Full-bridge single-stage PFC with reduced DC bus capacitor and improved light load operation as a solution for modern SMPS

Modern Single-Stage Switch Mode Power Supplies (namely Full-Bridge topologies for high power applications >500W), allows to regulate the output voltage and the input current, achieving a sinusoidal waveform by using only the four bridge transistors. However, these solutions still need to be optimized in order to become an interesting and attractive solution for modern Switch Mode Power Supplies with PFC function. One of the most important improvements needed is the downsizing and the cost reduction associated to the DC bus capacitor (C_F - filtering capacitor). Nevertheless, this action introduces several complex issues in the regulation of the input current and also high output voltage ripple. The proposed paper describes a new process to reduce the C_F value solving the identified issues. Firstly it is proved that it is possible to use a reduced capacitance/watt ratio, lower than the one that is typically used in commercial applications 0.5μF/W, while maintaining the accurate regulation of the input current. The output voltage ripple issues are solved using a modified One Cycle Control, OCC circuit. The concepts and solutions developed will be proved based on experimental results in an optimized FBSS topology that uses a Free Wheeling Capacitor, FWC, circuit in order to improve the low power operation.