DocumentCode :
1931659
Title :
An High Quality Image Scaling Engine for Large-scale LCD
Author :
Xiang, Zuquan ; Zou, Xuecheng ; Liu, Zhenglin
Author_Institution :
Dept. of Electron. Sci. & Tech., Huazhong Univ. of Sci. & Technol, Wuhan
Volume :
1
fYear :
2006
fDate :
16-20 Nov. 2006
Abstract :
In this paper, the architecture of the image scaling engine was introduced firstly. Then a new zooming algorithm named two-point cubic spline was proposed. Based on the proposed algorithm, an image scaling engine for large-scale LCD has been designed. The hardware implement of the proposed algorithm is simpler than that of bicubic. It is also faster than that of bicubic in computation time. But it can get an image quality closed to bicubic. So the proposed algorithm gets a high performance-to-price ratio. The interpolation filter and timing constraint conditions of the image scaling engine were also discussed in this paper. The image scaling engine was described in Verilog HDL and implemented in FPGA. The result of FPGA verification showed that the image scaling engine generated a good image quality both in static image and in dynamic video.
Keywords :
constraint theory; field programmable gate arrays; filtering theory; hardware description languages; image processing; interpolation; liquid crystal displays; splines (mathematics); FPGA verification; Verilog HDL; image scaling engine; interpolation filter; large-scale LCD; timing constraint conditions; two-point cubic spline; zooming algorithm; Algorithm design and analysis; Engines; Field programmable gate arrays; Filters; Hardware design languages; Image quality; Interpolation; Large-scale systems; Spline; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing, 2006 8th International Conference on
Conference_Location :
Beijing
Print_ISBN :
0-7803-9736-3
Electronic_ISBN :
0-7803-9736-3
Type :
conf
DOI :
10.1109/ICOSP.2006.345502
Filename :
4128917
Link To Document :
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