• DocumentCode
    1931797
  • Title

    Design considerations for 0·5 micron ultra thin film submicron SOI transistors by two-dimensional simulation

  • Author

    Armstrong, G.A. ; French, W.D. ; Davis, J.R.

  • Author_Institution
    Department of Electrical Engineering, Queen´´s Unriversity Belfast, N. Ireland
  • fYear
    1990
  • fDate
    10-13 Sept. 1990
  • Firstpage
    425
  • Lastpage
    428
  • Abstract
    Two dimensional device simulation is used to investigate problems associated with the design of 0.5 micron gate length SOI MOSFETs. The choice of SOI film thickness and doping to give acceptable values of threshold voltage, inverse subthreshold slope and breakdown voltage is considered for both n¿ and p¿channel transistors.
  • Keywords
    Algorithm design and analysis; Breakdown voltage; Doping; MOSFETs; Predictive models; Semiconductor films; Silicon on insulator technology; Solid modeling; Thin film transistors; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Device Research Conference, 1990. ESSDERC '90. 20th European
  • Conference_Location
    Nottingham, England
  • Print_ISBN
    0750300655
  • Type

    conf

  • Filename
    5436327
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1931797