Performance of digital neuro-computers

Author

Cornu, Thierry ; Ienne, Paolo

Author_Institution

MANTRA Centre for Neuro-Mimetic Syst., Swiss Federal Inst. of Technol., Lausanne, Switzerland

fYear

1994

fDate

26-28 Sep 1994

Firstpage

87

Lastpage

93

Abstract

This paper deals with performance measurement and evaluation of digital neuro-computers. We discuss the constraints introduced by hardware implementations. A revisited definition of computer speed-up is then proposed, taking into account both the traditional notion of parallelization speed-up and the algorithmic precision of the machines. Finally we show, on the example of the Kohonen feature map algorithm, how a fair benchmarking procedure can be established to evaluate digital neuro-computers more significantly than using the traditional Mcups metric

Keywords

neural net architecture; parallel architectures; parallel machines; performance evaluation; self-organising feature maps; Kohonen feature map algorithm; Mcups metric; algorithmic precision; benchmarking procedure; computer speed-up; digital neurocomputer performance; hardware implementations; parallelization speed-up; performance measurement; Artificial neural networks; Concurrent computing; Floating-point arithmetic; Hardware; Measurement; Parallel architectures; Parallel programming; Signal processing; Signal processing algorithms; Software libraries;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics for Neural Networks and Fuzzy Systems, 1994., Proceedings of the Fourth International Conference on

Conference_Location

Turin

Print_ISBN

0-8186-6710-9

Type

conf

DOI

10.1109/ICMNN.1994.593203

Filename

593203