A novel approach to real-time verification of transport system design using FPGA based emulator

Author

Hayashi, K. ; Miyazaki, T. ; Shirakawa, K. ; Yamada, K. ; Ichimori, T. ; Fukami, K. ; Ohta, N.

Author_Institution

NTT Opt. Network Syst. Lab., Yokosuka-Shi, Japan

fYear

1996

fDate

19-21 Jun 1996

Firstpage

5

Lastpage

10

Abstract

This paper discusses a new approach to efficient system design verification that uses an FPGA based real-time emulator. The architecture of a real-time emulator suitable for high-speed digital transmission system emulation and an experimental system are described. The proposed system consists of an emulation engine using the custom designed multi-chip module FPGA called PROTEUS-MCM, a program control unit, and a physical interface. The system can be used not only for real-time emulation of high-speed transmission systems, but also as initial systems for actual communication networks

Keywords

data communication; field programmable gate arrays; formal verification; PROTEUS-MCM; communication networks; design verification; digital transmission system; real-time emulator; transport system; B-ISDN; Communication networks; Costs; Emulation; Field programmable gate arrays; Laboratories; Performance evaluation; Real time systems; System testing; Test pattern generators;

fLanguage

English

Publisher

ieee

Conference_Titel

Rapid System Prototyping, 1996. Proceedings., Seventh IEEE International Workshop on

Conference_Location

Thessaloniki

Print_ISBN

0-8186-7603-5

Type

conf

DOI

10.1109/IWRSP.1996.506719

Filename

506719