2D computer simulation of emitter resistance in presence of interfacial oxide break-up in polysilicon emitter bipolar transistors

Two-dimensional computer simulations of the emitter resistance and majority carrier current flow in the presence of interfacial oxide break-up in polysilicon emitter bipolar transistors are shown and compared with published experimental results. The simulations reveal that the creation of a large number of extremely small gaps in the oxide layer can result in a substantial reduction in the emitter resistance even though most of the oxide layer remains intact.