Title :
The effects of gate and drain biases on the stability of low temperature poly-Si TFTs
Author :
Young, N.D. ; Gill, A
Author_Institution :
Philips Research Laboratories, Redhill, Surrey, UK.
Abstract :
Instabilities in low temperature poly-Si TFTs are shown to be due to the tunnelling of electrons into taps in the gate oxide, and to hot carrier induced interface acceptor state generation and trapping. Little evidence is seen for the creation of states in the poly-Si in the manner which has been reported for high temperature poly-Si TFTs. However, there is some evidence for the creation of mid gap acceptors and generation centres in our devices.
Keywords :
Degradation; Electron mobility; Electron traps; Glass; Plasma immersion ion implantation; Plasma stability; Plasma temperature; Stress; Thermal stability; Tunneling;
Conference_Titel :
Solid State Device Research Conference, 1990. ESSDERC '90. 20th European
Conference_Location :
Nottingham, England
