• DocumentCode
    1932511
  • Title

    Duty cycles in digital logic applications: a realistic way of considering hot-carrier reliability

  • Author

    Weber, W. ; Brox, M. ; Künemund, T. ; Schmitt-Landsiedel, D. ; Wang, Q.

  • Author_Institution
    Siemens AG, Corporate Research and Development, Otto-Hahn-Ring 6, D8000 Mÿnchen 83, West Germany
  • fYear
    1990
  • fDate
    10-13 Sept. 1990
  • Firstpage
    291
  • Lastpage
    294
  • Abstract
    In this paper various stages as appearing in digital logic, like inverters, NANDs, NORs, and transfer gates are hot-carrier stressed. Transient effects and the one of voltage combinations are discussed and an estimation for a realistic lifetime criterion is given.
  • Keywords
    Circuits; Degradation; Hot carrier effects; Hot carriers; Logic; MOSFETs; Pulse inverters; Research and development; Stress; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Device Research Conference, 1990. ESSDERC '90. 20th European
  • Conference_Location
    Nottingham, England
  • Print_ISBN
    0750300655
  • Type

    conf

  • Filename
    5436356