DocumentCode :
1932723
Title :
Minimising the impact of software instrumentation using on-chip debug and a secondary CPU Core
Author :
Fogarty, Padraig
Author_Institution :
Dept. of Electron. & Comput. Eng., Univ. of Limerick, Limerick, Ireland
fYear :
2012
fDate :
19-20 Sept. 2012
Firstpage :
1
Lastpage :
5
Abstract :
As SoC and general purpose controllers become more complex and more tightly integrated, gaining access to the runtime data required for software verification and debug has become more challenging. This means software engineers are now more reliant than ever upon software instrumentation and the on-chip mechanisms provided to extract this vital information. In this paper the author proposes using on-chip debug hardware coupled with a secondary CPU core to extract instrumentation data. Using a secondary core alleviates the need to modify the source code on the primary CPU and therefore avoids many of the difficulties with modifying code and minimises the impact of the software instrumentation.
Keywords :
program debugging; program verification; system-on-chip; SoC; general purpose controllers; instrumentation data extraction; on-chip debug hardware; secondary CPU core; software debug; software instrumentation impact minimization; software verification; source code; Data mining; Hardware; Instruments; Monitoring; Software; System-on-a-chip; Timing; Embedded software; Real time systems; Software debugging; Software testing; Software tools;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System, Software, SoC and Silicon Debug Conference (S4D), 2012
Conference_Location :
Vienna
ISSN :
2114-3684
Print_ISBN :
978-1-4673-2454-0
Electronic_ISBN :
2114-3684
Type :
conf
Filename :
6338144
Link To Document :
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