Title :
Scalable and retargetable debugger architecture for heterogeneous MPSoCs
Author :
Murillo, Luis Gabriel ; Harnath, Julian ; Leupers, Rainer ; Ascheid, Gerd
Author_Institution :
Inst. for Commun. Technol. & Embedded Syst. (ICE), RWTH Aachen Univ., Aachen, Germany
Abstract :
The increasing heterogeneity and parallelism of modern multi-processor systems on chip (MPSoCs) demand the evolution of existing debuggers in order to keep software development feasible. Such evolution will only be granted if upcoming software debuggers address key issues like abstraction, retargetability, scalability and convergence of information from different data sources. This paper presents a novel component-based, tree-aggregated debugger architecture which (i) grants flexibility and retargetability to deal with heterogeneous MPSoCs, and (ii) provides a framework to abstract complex details in order to facilitate debug of concurrency bugs. The debugger architecture is evaluated on an industrial-strength MPSoC virtual platform for mobile computing and next generation wireless communications.
Keywords :
multiprocessing systems; program debugging; system-on-chip; abstraction; component-based tree-aggregated debugger architecture; concurrency bugs; heterogeneous MPSoC; industrial-strength MPSoC virtual platform; information convergence; mobile computing; multiprocessor systems on chip; next generation wireless communications; retargetable debugger architecture; scalable debugger architecture; software debuggers; software development; Abstracts; Digital signal processing; Monitoring; Multicore processing; Software; Synchronization; Debugging; Embedded software; Multicore processing; Parallel programming; Virtual prototyping;
Conference_Titel :
System, Software, SoC and Silicon Debug Conference (S4D), 2012
Conference_Location :
Vienna
Print_ISBN :
978-1-4673-2454-0
Electronic_ISBN :
2114-3684