DocumentCode :
1933921
Title :
Design of a reliable planar edge termination for SiC power devices
Author :
Biserica, Otilia ; Godignon, Philippe ; Brezeanu, Gheorghe ; Badila, Marian ; Rebollo, Jose
Author_Institution :
Centro Nacional de Microeletronica, Barcelona, Spain
Volume :
2
fYear :
2001
fDate :
37165
Firstpage :
353
Abstract :
A reliable planar junction edge termination for SiC power devices, using a combination between a junction termination extension (JTE) with a field plate, containing a dielectric (AlN) with a higher dielectric constant than of silicon dioxide, is obtained by way of numerical simulation using ISE-TCAD software. The performance achieved by this combination includes a higher breakdown voltage and an electric field in the insulator below its critical electric field, thus avoiding premature breakdown. In addition, this termination has the advantage that it is not particularly sensitive to the interface charge
Keywords :
dielectric thin films; power semiconductor devices; protection; semiconductor device breakdown; semiconductor device models; silicon compounds; technology CAD (electronics); wide band gap semiconductors; ISE-TCAD software; SiC; SiC power devices; SiO2-AlN; breakdown voltage; dielectric constant; field plate; interface charge; junction termination extension; numerical simulation; premature breakdown avoidance; reliable planar junction edge termination design; reverse blocking voltage; Dielectric devices; Dielectric substrates; Electric breakdown; High-K gate dielectrics; Implants; Numerical simulation; Passivation; Silicon carbide; Silicon compounds; Thermal conductivity;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Conference, 2001. CAS 2001 Proceedings. International
Conference_Location :
Sinaia
Print_ISBN :
0-7803-6666-2
Type :
conf
DOI :
10.1109/SMICND.2001.967482
Filename :
967482
Link To Document :
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