Small-signal modelling of MOSFET for circuit design applications

We propose simple, explicit expressions for the gate-bulk incremental capacitance and terminal conductances of a long-channel MOS transistor. The new expressions are valid in the moderate inversion region and consequently are superior to the traditional circuit simulation MOS models. We compare results to a numerical charge-sheet model and experimental measurements. Because of the explicit dependence on applied voltages, the new expressions are computationally efficient. They allow a semi-empirical inclusion of the second-order effects similar to the traditional models.