DocumentCode :
1934163
Title :
Integration of Poly Buffered Locos and Gate Processing for Submicron Isolation Technique
Author :
Juenghng, W. ; Hillenius, S.J. ; Chen, M.L. ; Fritzinger, L.B.
Author_Institution :
AT&T Bell Laboratories, Allentown, PA
fYear :
1991
fDate :
17-19 June 1991
Keywords :
Buffer layers; Hafnium; MOS devices; Stress; Surface topography; Wet etching;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Device Research Conference, 1991. 49th Annual
Conference_Location :
Boulder, CO, USA
Print_ISBN :
0-87942-647-0
Type :
conf
DOI :
10.1109/DRC.1991.664728
Filename :
664728
Link To Document :
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