DocumentCode :
1934345
Title :
Physical modelling strategy for (quasi-) saturation effects in lateral DMOS transistor based on the concept of intrinsic drain voltage
Author :
Anghel, C. ; Hefyene, N. ; Ionescu, A.M. ; Vermandel, M. ; Bakeroot, B. ; Doutreloigne, J. ; Gillon, R. ; Frere, S. ; Maier, C. ; Mourier, Y.
Author_Institution :
Ecole Polytech. Fed. de Lausanne, Switzerland
Volume :
2
fYear :
2001
fDate :
37165
Firstpage :
417
Abstract :
This paper deals with the investigation of the LDMOSFET saturation mechanisms via 2D numerical simulations and experiments. A clear separation between the saturation of intrinsic MOS transistor and complex quasi-saturation mechanisms is made using the intrinsic drain concept. A modelling strategy for drain current based on the experimental extraction of the drift series resistance is presented. Very good model performances using a BSIM3v3 low voltage model combined with the proposed drift resistance extracted values are reported
Keywords :
field effect transistor switches; power MOSFET; power semiconductor switches; semiconductor device models; 2D numerical simulations; BSIM3v3 low-voltage model; HV transistors; LDMOSFET saturation mechanisms; drain current; drift series resistance extraction; fast switching components; high voltage devices; intrinsic drain voltage; lateral DMOS transistor; physical modelling strategy; quasi-saturation mechanisms; Analytical models; Automotive engineering; CMOS technology; MOSFETs; Microelectronics; Numerical simulation; Physics; Radio frequency; Semiconductor device modeling; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Conference, 2001. CAS 2001 Proceedings. International
Conference_Location :
Sinaia
Print_ISBN :
0-7803-6666-2
Type :
conf
DOI :
10.1109/SMICND.2001.967497
Filename :
967497
Link To Document :
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